I previously wrote my review of the Freescale KL25. Since then I’ve finished my first design with the KL25. The second spin of the board will see several of the peripherals and pins rearranged. Most of this has to do with things that I glossed over in the documentation desire to get the product to market. None were killers, but required some work-around or are being changed to improve functionality.
Keeping I/O Busses Active
To get the lowest current you try and shut things off. Well, you only have a finite number of choices for clocking your peripherals. This becomes especially tricky if you are using the very low power run (VLPR) mode. First off, pull up table 5-2 (p. 121) from the reference manual. This shows you the clocking options. Now, pull up table 7-2 (p. 144) to see which peripherals and clocks are available for the low power modes you want to operate in.
The first question is, do you want to have the SPI bus active while in a stop mode? If so, we have to use partial stop mode (PSTOP2 where the bus clock is active) and SPI0, which is clocked off the bus clock. Otherwise we can use SPI1 which is clocked off the faster system clock, but is only operable during run or wait states. The next consideration, will be the desired speed, especially during VLPR mode. If we are going to use VLPR mode, SPI1 can run at 4x (in reality, closer to 5x) the speed of SPI0 due to limitiation on the bus and system clocks in VLPR mode. Either SPI bus will work as a slave in stop and VLPS modes, but the bus speed limits are half what they are for masters in the same mode.
Do you need more than one UART? If not, just use UART0. It has more clocking options and there are no downsides compared to UART1 or UART2. If you need more than one UART, the question becomes what modes do you want your UARTs active in? There is one low power UART (UART0) that can be active in stop or VLPS modes. So, the first question is if you need multiple UARTs active, which one will you need to monitor more than the others? This device needs to be hooked up to UART0. If that is not an issue, are you using the VLPR mode? If so, UART1 & UART2 have a much lower line speed in these modes compared to what UART0 can do.
Do you need more than one I2C bus? If not, just use I2C0, as it will work in PSTOP2 mode. (I haven’t confirmed this. The documentation leaves me a little unsure here.)
What I found out is there is not an internal way to see if VUSB+ is hooked up to the VREGIN pin. So, throw a voltage divider on the board and hook it up (the divided voltage) to a pin so you can sense if there is a USB connection. I initially started this project thinking I would use the USB port for communications, but ended up just using it for charging the battery. That means that I was not running any of the USB stack on the MCU. The next spin of the board I plan on putting a KL15 on it instead, since I am not actually using the USB interface, except for charging.
The first thing I found, and mentioned in the comments in the prior article, only GPIO port A & D have interrupt capability. On top of that, if you are using any of the low leakage stop modes, if you want to interrupt on a GPIO, it needs to be connected to a pin that is connected to the low leakage wakeup unit (LLWU). There are only two pins which are able to interrupt while awake or in the low leakage stop modes. These two pins are PTD4 & PTD6. They are available on all packages.
Of note is PTA4. It defaults to NMI. If you plan on using this as an input that is not the NMI, make sure that you put code before main() to change the pin setup. If you wait until main to do it, you may trigger the NMI before you get to main() and wonder what in the world is going on. The same goes for PTA20, which defaults to RESET_b.
If you decide you need to use the pins that SWD is on, don’t forget to double-check your circuit so that you do not hurt either the programmer or target device when trying to program. Yes, you already know this, but take a minute and check it for me. You’ll thank me one of these times.
If you are using a package that has external VREF +/- pins, make sure to hook them up. The documentation alludes to multiple options for ADC references, but I was unsuccessful using the alternate VREF setting. I assumed that the alternate VREF setting was internal connection to VCC & GND. This isn’t a big deal as VREF +/- are right next to VCC and GND pins.
Now that we’ve talked about peripheral selection, here’s the general order I would use for selecting what goes on which pins:
- Which signals need to be on GPIOs that need to interrupt while running and in low leakage stop modes.
- Serial busses – SPI, UART, I2C
- other internal peripherals (ADC, DAC, comparitor)
- Input GPIOs (put these on extra pins on ports A & D)
- Output GPIOs
While deciding what goes where, remember, you have to route all these traces so try to keep them as short as possible and away from each other as much as possible. We don’t need to add another two layers to the board when it can be avoided.
Overall, I am pleased with what I have seen out of the KL25 series of MCUs. I’m interested to poke around with the KL05 series to see if it’s worth replacing some PICs or MSP430s for low end designs. I’m not convinced of that, just because of the coding complexity of bringing things up (more time spent with init code) and low power current with SRAM backed up. We shall see.